8051 architecture sem

 Formal Definition of 8051 Microcontroller:

“The 8051 Microcontroller is an 8-bit microcontroller developed by Intel, which consists of an on-chip Central Processing Unit (CPU), Read Only Memory (ROM/EPROM), Random Access Memory (RAM), input/output ports, timers/counters, serial communication interface, and interrupt control — all integrated on a single Very Large Scale Integration (VLSI) chip.”
It is a Harvard architecture-based, single-chip computer, mainly used for embedded control applications such as automation, measurement, and process control.

Block Diagram of 8051 Microcontroller

The 8051 Microcontroller is an 8-bit microcontroller developed by Intel. It has on-chip CPU, ROM, RAM, I/O ports, timers, serial communication, and interrupt controller — all integrated on a single VLSI chip.

Main Components of 8051 Architecture

Central Processing Unit (CPU):

  • Controls all operations of the microcontroller.

  • Performs arithmetic and logical operations through ALU (Arithmetic Logic Unit).

  • Fetches, decodes, and executes instructions.

Oscillator and Clock Circuit:

  • Provides clock pulses for synchronization of all internal operations.

  • Typically uses a 12 MHz crystal oscillator to produce 1 µs instruction cycle.

Program Memory (ROM/EPROM):

  • 4 KB on-chip ROM for program storage.

  • Can be expanded externally up to 64 KB.

  • Stores program instructions permanently.

Data Memory (RAM):

  • 128 bytes on-chip RAM for data storage.

  • Divided into:

    • Register banks (00H–1FH)

    • Bit-addressable area (20H–2FH)

    • General purpose RAM (30H–7FH)

Program Counter (PC):

  • 16-bit register that holds the address of the next instruction to execute.

  • Automatically increments during instruction fetch.

Data Pointer (DPTR):

  • 16-bit register used to access external memory.

  • Consists of DPH (high byte) and DPL (low byte).

Accumulator (A) and B Register:

  • Accumulator (A): Main register for arithmetic and logic operations.

  • B Register: Used in multiplication and division operations with A.

Program Status Word (PSW):

  • Contains flag bits (CY, AC, OV, P, etc.) used for conditional branching and arithmetic status.

  • Also holds Register Bank select bits (RS0, RS1).

Stack Pointer (SP):

  • 8-bit register that points to the top of the stack in internal RAM.

  • Default value after reset: 07H.

I/O Ports:

  • Four 8-bit parallel ports (P0, P1, P2, P3) – total 32 I/O pins.

  • All ports are bi-directional.

  • Port 0 and Port 2 also serve as address/data buses for external memory.

  • Port 3 has alternate functions such as serial communication, timers, and interrupts.

Timers/Counters:

  • Two 16-bit timers (Timer-0 and Timer-1) for time delay generation or event counting.

  • Controlled by TMOD and TCON registers.

Serial Communication Port:

  • Provides full-duplex communication (transmit and receive simultaneously).

  • Uses pins P3.0 (RXD) and P3.1 (TXD).

  • Supports UART mode with variable baud rate.

Interrupts:

  • 8051 supports 5 interrupts (2 external, 3 internal).

  • Managed through Interrupt Enable (IE) and Interrupt Priority (IP) registers.

Bus System:

  • Data Bus (8-bit): Transfers data between CPU and peripherals.

  • Address Bus (16-bit): Selects memory locations for read/write operations.

Block Diagram (Text Description)

+-------------------------------+
|        CPU (ALU + CU)         |
+-------------------------------+
   |     |     |     |     |
+---------+     |     |     +----------+
| Program  |    |     |                |
| Memory   |    |     |                |
+---------+     |     |                |
| Data RAM |----+     |                |
+---------+           |                |
| Timers  |-----------+                |
+---------+                            |
| I/O Ports (P0–P3) -------------------+
+---------+
| Serial Port |
+-------------+
| Interrupt Ctrl |
+----------------+

Key Features of 8051

  • 8-bit CPU with Harvard architecture

  • 4 KB on-chip ROM, 128 bytes RAM

  • 32 I/O pins (4 ports)

  • Two 16-bit timers/counters

  • Five interrupts (3 internal, 2 external)

  • One serial port (full-duplex)

  • 16-bit program counter and data pointer

  • Clock frequency up to 12 MHz










8051 Architecture (Short Version)

‣ CPU (Central Unit): Controls all µC operations; executes via ALU; fetch–decode–execute cycle.

‣ Oscillator/Clock: Generates sync pulses; 12 MHz crystal → 1 µs/instruction cycle.

‣ Program Memory (ROM/EPROM): 4 KB on-chip; expandable to 64 KB; stores permanent code.

‣ Data Memory (RAM): 128 B on-chip; includes Register Banks (00H–1FH), Bit Area (20H–2FH), GPR (30H–7FH).

‣ Program Counter (PC): 16-bit register; holds next instruction address; auto-increments on fetch.

‣ Data Pointer (DPTR): 16-bit (DPH + DPL); accesses external data memory.

‣ Accumulator (A) & B Register: A → main ALU register; B → used in MUL/DIV ops with A.

‣ Program Status Word (PSW): Holds flag bits (CY, AC, OV, P) + bank select bits (RS0, RS1).

‣ Stack Pointer (SP): 8-bit; points to stack top in RAM; default = 07H after reset.

‣ I/O Ports: Four × 8-bit (P0–P3) → 32 I/O pins; P0/P2 = Addr/Data bus; P3 = Alt functions.

‣ Timers/Counters: Two × 16-bit (T0, T1); used for delay/counting; controlled by TMOD, TCON.

‣ Serial Port: Full-duplex UART; uses P3.0 (RXD), P3.1 (TXD); variable baud rate.

‣ Interrupts: 5 sources (2 ext, 3 int); controlled via IE & IP registers.

‣ Bus System: 8-bit Data Bus + 16-bit Address Bus → handles data & memory access.

Advantages

  • Single-chip system (CPU, ROM, RAM, I/O, timers, serial port)
  • Minimal external hardware → compact & low-cost
  • Fast peripheral access → higher execution speed
  • Simple 8-bit instruction set → easy programming
  • Low power consumption (Idle/Power-Down modes)
  • Upward-compatible with 8048/8084
  • Expandable memory (64 KB program + 64 KB data)
  • Bit/byte addressable → ideal for control tasks

Disadvantages

  • Limited on-chip memory (4 KB ROM, 128 B RAM)
  • Slower execution (12 clocks/instruction)
  • No built-in ADC/DAC
  • Limited 16-bit addressing (64 KB max)
  • Rigid architecture, no I/O expansion
  • No hardware floating-point support

Applications

  • Home appliances (washing machines, ovens)
  • Industrial automation (motor/process control)
  • Communication systems (modems, GSM modules)
  • Consumer electronics (clocks, consoles)
  • Traffic control & safety systems
  • Military/aerospace embedded control
  • Medical devices (patient monitors)
  • Data acquisition & IoT systems